Job Description
Responsibilities
- Participate in chip product specification definition, including algorithm analysis and module-level specification development.
- Implement and verify digital circuits at the RTL level, performing power, performance, and area (PPA) optimization.
- Conduct digital circuit synthesis, timing analysis, and related design tasks.
- Experience in developing algorithm-based digital circuits; candidates with experience in PPA optimization, complex IP design, or ultra-low-power circuit design are preferred.
- Proficient in Verilog or SystemVerilog, and skilled in using scripting languages such as C, Tcl, Shell, Perl, or Python.
- Familiar with SDC constraint writing and Netlist ECO flows; proficient with EDA tools such as VCS, Verdi, DC, Formality, and SpyGlass; knowledge of PT tool usage or UVM verification methodology is a plus.
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