Physical Design Engineer

Bayan Lepas, Malaysia | Posted on 04/08/2026

Responsibilities

• You will be participating in the leading-edge System‑On‑a‑Chip (SoC) design projects using cutting‑edge process technology nodes for various client applications.
• Execute complete physical design flow from RTL to GDS (synthesis, floorplan, power grid, place and route, clock tree synthesis), participating in design/architecture reviews to track design milestones.
• Evaluate and improve physical design methodologies to handle increasingly complex SoC/IP designs within aggressive, market‑driven schedules.
• Actively work as part of a team both locally and with remote or multi‑site teams.
• Actively assists full chip timing constraints development, full chip Static Timing Analysis, and timing signoff for a complex, multi‑clock, multi‑voltage SoC.
• Actively assists in full chip physical verification activities including DRC and LVS convergence &