Senior Analog ASIC Layout Engineer - Precision Timing

A leading technology firm in the UK seeks a Senior Analog ASIC Layout Engineer to enhance their ASIC team's capabilities. The role involves collaborating closely with the design team to bring cutting-edge oscillator ASIC designs into silicon, ensuring high-performance layouts that meet production standards. Candidates should possess over 5 years of experience in analogue circuit layout, proficiency in Cadence tools, and strong interpersonal communication skills. This permanent role offers the opportunity to work at the forefront of ASIC design and development.
#J-18808-Ljbffr