SoC Frontend Design Engineer RTL, Low Power & Verification

A leading technology company in Singapore is seeking a SOC Design Engineer to join their SoC Front End Design team. This role involves designing digital logic using VHDL/Verilog, developing RTL compliant with power requirements, and verifying designs through simulation. Candidates should have a degree in Electrical or Electronics Engineering and experience in DSM SoC design. Fresh graduates are encouraged to apply, providing a chance to start a significant career in the IC design industry.
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