Job Description

We are hiring a Custom Layout Engineer with strong hands-on experience in advanced-node analog and mixed-signal layout, contributing to high-quality silicon at cutting-edge process technologies. This role emphasizes precision layout, verification closure, and close collaboration across design teams.


Job Description:

  • Design and deliver analog and mixed-signal layouts on advanced nodes (3nm and below), including hierarchical layout implementation
  • Execute floorplanning, track planning, PG planning, and ensure robust device and routing matching
  • Implement digital logic layouts using Cadence GXL and VSR router
  • Run and close physical verification including DRC, LVS, Antenna, and ERC using Calibre PV on lower technologies
  • Support TSMC 2nm layout design for analog/mixed-signal blocks with strong attention to quality and manufacturability
  • Collaborate effectively with cross-functional teams to achieve design and sign-off goals


If you’re looking to work on next-generation nodes and own layout quality from planning through verification, this role offers strong technical depth and impact.


Regards,

Karthik Kumar

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