Analog IC Layout Engineer with finFET experience

Senior Analog IC Layout Engineer with finFET experience 

Chipright seeks highly motivated and experienced Analog Layout engineers to work in developing and delivering IP to our customers. This is a fantastic opportunity for talented engineers to work within a team of highly experienced engineers with experience with high-speed technology, CMOS and FinFet.

Seeking experienced Layout Engineers, you will have first-hand responsibility for the physical design (i.e. the actual implementation) of Analog and Mixed Signal circuits for High Speed Serializer/Deserializer (SerDes); you will work on high performance analog and high frequency circuits in the most scaled CMOS technologies, interact with designers and drive layout strategies for very complex products.

Requirements

7+ years’ minimum experience with Analog / Analog mixed signal IC layout

Experience/knowledge of the FinFet process especially 16nm, 7nm

 Layout of Analog IPs such as Data Converters (A/D, D/A), Phase Locked Loop (PLL), Tc/RX reference circuits with emphasis on high speed applications.

Profound knowledge of hardware description languages (VerilogA, VerilogAMS)

Collaborate with Applications, Process Technology, CAD, Test, Reliability, Marketing and Product Engineering;

Excellent understanding of mixed-signal semiconductor circuit technology

Excellent communication skills and ability to work in a team

Very good command of English (fluent in spoken and written)