ASIC Micro Architecture - Principal Engineer

The ASIC Micro-Architecture Principal Engineer is responsible for defining, implementing, and delivering high-performance, power-efficient, and area-optimized micro-architectures for complex ASICs and SoCs. The role requires deep technical expertise across micro-architecture definition, RTL implementation, PPA optimization, and cross-functional execution from concept through tape-out and mass production.

Key responsibilities
Define micro-architecture specifications:

Translate high-level architectural requirements into detailed micro-architectural and functional specifications. This includes defining data paths, control logic, and pipeline stages.
Performance, power, and area (PPA) trade-offs:

Analyze and evaluate different design approaches to achieve optimal PPA metrics. Good in analysing downstream impact on PPA critical constraints.
RTL development:

Implement the micro-architecture in a hardware description language (HDL) like Verilog or ...