Job Description

Duration: 6 months





Job Duties:

  • The work will expose the designer to a number of IP including ARM cores, Ethernet, DDR, DMA, PCIE, SATA and Client internal IPs. Successful candidates will be responsible for leading, and participating in, the design of leading edge SoCs in advanced digital CMOS processes.

  • Our RTL Design Engineers are expected contribute to all aspects of SoC design including chip definition, architecture development and modeling, development of micro-architectural specifications, conversion of micro-architectural specifications to logic implementation, verification, emulation, debug, synthesis, and timing closure, Interfacing with physical execution, software, and silicon bring-up teams.


 

Experience and Education:


  • SoC Design.

  • Knowledge AND hand-on experience from industry ASIC design flow including RTL coding...

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