ASIC Static Timing Analysis Engineer

ASIC Static Timing Analysis Engineer

We are looking for motivated engineers with Static timing analysis skill; good knowledge on timing convergence and corner definition in advanced tech nodes. If you have expertise in this area and are excited by driving leading edge semiconductor technologies those make differences on this world, this is the opportunity for you. In this highly visible role, the candidate is expected to coordinate with 100+ engineers, work across multiple design teams in USA and beyond USA, work inside and with outside company/vendor, juggle various tech node issues concurrently. Experience in various STA tools, timing signoff margin development, Timing sign off Corner development, Full chip timing closure, tape-out, and post-silicon analysis is an excellent skill to have in this position. As an ASIC Timing analysis engineer, you will be responsible for all aspects of timing including, defining corners, helping construct and/or modify flows, PPA improvement...