Job Description

Job Title: Design Verification Engineer (UVM/SoC) Role Summary

We are seeking a detail-oriented Design Verification Engineer to join our hardware engineering team. You will be responsible for the full functional verification lifecycle of complex IP blocks and SoCs. Your primary focus will be building robust, scalable UVM-based environments to ensure our silicon is first-time-right.

Key Responsibilities
  • Testbench Architecture: Develop and maintain sophisticated UVM-based testbenches and reusable verification components, including drivers, monitors, agents, and scoreboards.

  • Strategic Planning: Create and execute detailed verification plans by analyzing design specificati...

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