Design Verification Engineer

### Job Description: ASIC Design Verification Engineer

**Location:** - Bangalore, Chennai, Hyderabad, Noida,Malaysia, Germany.

**Experience Range:** 5 to 20+ years

**Key Responsibilities:**

- Develop and execute test plans to verify complex ASIC designs.

- Utilize System Verilog (SV) and UVM methodologies for verification tasks.

- Perform functional, formal, GLS (Gate-Level Simulation), power, and CPU verification.

- Conduct IP and subsystem-level verification, ensuring robust verification of high-speed protocols.

- Work closely with RTL designers to understand design specifications and requirements.

- Write and maintain C/C++ test benches for verification environments.

- Perform coverage analysis and drive coverage closure.

- Debug issues found during verification and work with design teams to resolve them.

- Participate in design and verific...