Job Description
Our client seeks a Verification Engineer to perform IP- level functional and performance verification in a UVM- based environment - This is a Direct and permanent Role.
Skills Required
Skills Required
- Experience in UVM-based IP-level verification.
- System Verilog and UVM methodology
- RTL verification and debugging
- Solid understanding of digital design concepts and verification methodologies.
- Excellent communication and collaboration skills.
- Ownership mindset with a focus on quality and timely delivery.
- Experience with NOC Subsystem
- Good Knowledge of Memory Protocols DDR, LPDDR, HBM SystemC/ TLM modeling concepts
- Experience with SystemC-RTL co-...
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