Job Description

Design Verification Engineer

We are looking for an experienced Design Verification Engineer. The ideal candidate will have 4-8 years of experience in the field of semiconductor design verification, and a proven track record of success in developing and executing verification plans for complex SoC designs.

Engineers with good experience will be considered by senior or staff position.

Responsibilities

The Design Verification Engineer will be responsible for verification of digital and mixed‑signal designs, including systems‑on‑chip with multiple CPUs, and digital signal processors, security hardware, and other logic for IoT applications.

Specific Responsibilities

  • Ideal candidate should have demonstrated successful design verification tasks at block, sub‑system, and full‑chip level.
  • Must have participated in all phases of chip development, from creating test plans, creating testbench environment (SV/UVM), integrat...

Apply for this Position

Ready to join UNI CONNECT PTE LTD? Click the button below to submit your application.

Submit Application