Job Description
DFT Engineer
Experience - 5+years
Location- Bangalore/Hyderabad
Experience with Chip level DFT and Post Silicon debug / analysis
Understanding of DFT architectures like :
- scan chain insertion and verification
- Scan Compression Techniques
- JTAG
Experience - 5+years
Location- Bangalore/Hyderabad
Experience with Chip level DFT and Post Silicon debug / analysis
Understanding of DFT architectures like :
- scan chain insertion and verification
- Scan Compression Techniques
- JTAG
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