Job Description
Requirements:
- 5 to 8 year experience in DFT feature verification (such as JTAG, MBIST, SCAN, fuse, IO-PHY loopback testing)
- Strong background in Verilog, System Verilog (SV), SVA, UVM verification methodologies and C++
- Strong debug skills and experience with debug tools such as Verdi....
- 5 to 8 year experience in DFT feature verification (such as JTAG, MBIST, SCAN, fuse, IO-PHY loopback testing)
- Strong background in Verilog, System Verilog (SV), SVA, UVM verification methodologies and C++
- Strong debug skills and experience with debug tools such as Verdi....
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