Digital Asic Design Engineer

Experteer OverviewIn this Senior ASIC Design Engineer role, you will contribute to cutting-edge SoC designs at the forefront of AI and HPC, shaping next-generation semiconductor solutions. You will work within a dynamic, multicultural team focused on delivering robust RTL implementations and high-quality IP. You will tackle design challenges across the full cycle, from RTL development to tapeouts and integration. The role offers hybrid working in Barcelona (with Rome as an alternate base) and a path to impact large-scale, future-focused technologies.

Compensaciones / Beneficios

• Contribute to RTL design (Verilog/SystemVerilog) for SoC projects
• Contribute to semiconductor IP design and integration
• Support and participate in tapeouts and verification activities
• Automate design flows using TCL
• Collaborate with cross-functional teams on cutting-edge AI/HPC SoC initiatives

Responsabilidades

• Bachelors in Elect...