DRAM Design Senior Layout Engineer

We are looking for a DRAM Layout Engineer in the DRAM Engineering Group (DEG) at Micron Technology, Inc. As a Layout Engineer, you will work with a collaborative, global team on multiple projects, plan and document layouts, and share materials for global review.

• Design and development of IP layouts used in DRAM chips.
• Perform layout verification such as LVS/DRC/EM, quality checks, and documentation.
• Ensure timely delivery of block-level layouts with acceptable quality.
• Guide and lead less experienced team members in their execution of sub-block-level layouts and review their work.

• At least 5 years of validated experience in analog layout designs in CMOS processes.
• Experience with IP layout development and physical verification activities for complex designs per provided specs.
• Solid knowledge of layout area and routing optimization, design...