Job Description
Hi all jobseekers,
Modernize chip solutions is hiring for the below requirements.
Role: Design Verification Engineer
Skill: DV with IP, PCIE exp
NP: Immediate to 30 days
Loc: BLR
Exp: 4+ yrs
Role: Design Verification Engineer
NP: Immediate to 30 days
Loc: BLR
Exp: 5+ yrs, 10+yrs
Skill: DV with Strong experience in Sv and UVM,
Scripting languages - such as python/perl
Tools like vcs, verdi, etc.
Experience in creating and maintaining testbenches in sv/uvm, with networking SoCs, High speed Serdes, Functional coverage and assertions
GLS - zero delay & SDF, X prop simulations.
If anyone interested, please share your profile to my mail id [email protected]
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