Engineer – Defectivity (Semiconductor)

About The Business

Tata Electronics Private Limited (TEPL) is a greenfield venture of the Tata Group with expertise in manufacturing precision components.

Tata Electronics (a wholly owned subsidiary of Tata Sons Pvt. Ltd.) is building India’s first AI-enabled state-of-the-art Semiconductor Foundry. This facility will produce chips for applications such as power management IC, display drivers, microcontrollers (MCU) and high-performance computing logic, addressing the growing demand in markets such as automotive, computing and data storage, wireless communications and artificial intelligence.

Tata Electronics is a subsidiary of the Tata group. The Tata Group operates in more than 100 countries across six continents, with the mission 'To improve the quality of life of the communities we serve globally, through long term stakeholder value creation based on leadership with Trust.’

Responsibilities

• Own inline defect density performance (e.g., particles/defects per wafer or per cm²) and drive reductions to meet yield, quality, and customer targets.
• Operate and optimize defect inspection across tools (optical brightfield/darkfield, patterned wafer inspection) including recipe tuning, nuisance reduction, and tool-to-tool matching.
• Define and execute defect monitoring strategy : Lot/monitor wafer plan, inspection points (pre/post critical steps), sampling rates, and sensitivity/recipe settings.
• Perform defect disposition and classification : nuisance vs real defects, systematic vs random; maintain defect library and automate classification where applicable.
• Lead defect excursion management : rapid detection, lot containment (hold/quarantine), risk assessment, and communication with Production/QA/Yield.
• Drive adder control by step/tool/module: quantify adders (after–before), identify top contributing tools/recipes/chambers, and lead corrective actions.
• Execute root-cause analysis (RCA) using defect maps, signature analysis, cluster/hotspot detection, equipment logs, PM history, chemical/consumable lots, and wafer transport/FOUP history
• Coordinate defect review and failure analysis : SEM review, EDS, FIB cross-section requests; correlate physical defects to electrical impact with Yield/Product teams.
• Own defect density and D0 performance; quantify defect-to-yield loss using kill ratio, CP/WAT correlation, and yield loss prediction models.
• Lead DSA and manage the defect library/classification (real vs nuisance); drive nuisance filtering and review/BKM standardization.
• Develop and optimize inspection recipes (sensitivity/threshold/care-area), tool matching, and post-PM qualification to control adders and excursions.
• Drive defect reduction CIP: Pareto top contributors, RCA with module/equipment/CFM/yield teams, and implement CAPA for sustained improvement
• Support new inspection tool installs, tech transfer, and ramp by completing tool qualification and production release, defining acceptance criteria, and ensuring sustainable capacity and uptime.
• Mentor more Engineers as required
• Travel, as necessary
• Presentation to internal teams and senior executives
• Drive cross-functional yield improvement projects and DOEs
• Apply structured problem-solving and risk tools: FMEA, 8D, and strong RCA to drive effective corrective action and prevent recurrence
• Ensure inspection measurement capability/accuracy via basic MSA/GR&R and tool-to-tool correlation
• Use SPC, FDC, and APC to monitor process health, detect excursions early, and enable data-driven defect/yield control

Essential Attributes

• Able to work independently, self-motivated with a strong drive to win.
• Team player with the ability to work across diverse cross-functional teams spread across the world.
• Leadership skills to influence all levels of the organization.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

Qualifications

• M.Tech/M.E. in Chemical Eng, Electrical/Electronics Eng, Mechanical Eng, Materials/Materials Science, Physical Science, or equivalent.
• Strong understanding of analytical techniques (SEM, FIB, TEM, Photo-Emission, SIMS, ICP-MS, Chromatography, Nano-probing, etc).
• Deep understanding of Semiconductor wafer Fabrication
• Proven track record in yield improvement on new and mature technologies
• Ability to lead cross-functional teams and achieve project completion within timeline and cost targets
• Ability to work across different cultures and geographies
• Good team player
• Innovation and competitive mindset

Desired Experience Level

• 7+ years experience in the semiconductor industry
• Proven track record of successfully developing new technologies into high volume production
• Proven problem solving skills using design of experiments and analytical tools