Engineer- Design Verification

Opportunity for a talented individual for their memory interface products.

We are looking for a candidate with a strong background in verifying complex integrated circuits.

• The candidate needs to have skills that are up to date with the latest IC verification tools and flow.
• The candidate will work closely with design, and verification engineering.
• In addition, strong collaboration and communication skills are a must.

Duties/Responsibilities:

• Develop verification testbench components for chip/module level using System Verilog.
• Use high-level concepts (Object-oriented, UVM, etc) to develop an extendable environment.
• Define and execute detailed verification plan from spec working with architects and designer engineers
• Experience in code coverage, functional coverage, assertions, cover groups, etc to achieve 100% verification completeness before tape-out.