Job Description
Formal Verification Engineer
European Tech Recruit are working closely with a leading semiconductor company, based in Lausanne, who are looking for a talented Formal Verification Engineer to join their team.
This role can also be available working out of their Reading (UK), Northampton (UK) or Dortmund (Germany) offices.
Responsibilities as Formal Verification Engineer:
Develop formal verification methodologies and best practices.
Participate in RTL design reviews.
Prepare design verification plan based on design specifications.
Document results and coverage metrics for formal sign-off.
Plan and schedule assigned projects for timely completion.
Maintain design verification environment and track & close design bugs.
Requirements:
5+ years' experience in the semiconductor industry.
Proven track record in verifying complex designs (preferably in high volume applications) - FPGA or ASIC.
Skilled in trade-offs between quality and schedule.
Good scri...
European Tech Recruit are working closely with a leading semiconductor company, based in Lausanne, who are looking for a talented Formal Verification Engineer to join their team.
This role can also be available working out of their Reading (UK), Northampton (UK) or Dortmund (Germany) offices.
Responsibilities as Formal Verification Engineer:
Develop formal verification methodologies and best practices.
Participate in RTL design reviews.
Prepare design verification plan based on design specifications.
Document results and coverage metrics for formal sign-off.
Plan and schedule assigned projects for timely completion.
Maintain design verification environment and track & close design bugs.
Requirements:
5+ years' experience in the semiconductor industry.
Proven track record in verifying complex designs (preferably in high volume applications) - FPGA or ASIC.
Skilled in trade-offs between quality and schedule.
Good scri...
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