FPGA Design, Validation, and Automation for AMD Xilinx SoC Platforms  Intern

As an AMD [intern/co-op], you’ll be placed at the epicenter of the AI ecosystem, working alongside experts and industry pioneers. You’ll do important work, learn new skills, expand your network, and gain real-world experience on projects that impact millions of end-users worldwide. Whether you’re an undergrad or a PhD student, your contributions matter—and your experience here will be a launchpad for what comes next. LOCATION: Singapore CRITERIA: Current students studying in Universities which are based in Singapore INTERNSHIP DURATION: The internship will begin on either 4 May 2026 or 20 July 2026, and will end on 4 Dec 2026. There is an option to extend the internship, with the extended period concluding on a fixed date of 18 Dec 2026. Intern – FPGA Design, Validation, and Automation for AMD Xilinx SoC Platforms WHAT YOU CAN EXPECT TO LEARN: Gain hands-on experience with industry-standard AMD Xilinx toolchains and hardware platforms. Learn about the architecture and bring-up processes for AMD Xilinx SoCs, including Versal ACAP and Spartan UltraScale+ MPSoC. Develop skills in validating hardware interfaces, writing embedded firmware, and automating verification and validation flows. Build a strong foundation in FPGA/SoC development and system-level debugging. PROJECT OVERVIEW: Work as part of our engineering team to develop and validate advanced hardware designs on AMD Xilinx platforms. You will contribute to Vivado and Vitis projects, support hardware platform bring-up and testing, and help automate validation workflows for next-generation AMD SoC products. KEY RESPONSIBILITIES: Develop Vivado and Vitis projects tailored to AMD Xilinx hardware platforms. Validate hardware interfaces and test compiled project binaries on AMD SoC evaluation boards. Bring up hardware platforms, perform low-level debugging, and using embedded tools to configure systems. Creating detailed documentation and writing automation scripts to support a repeatable validation flow. WHO ARE WE LOOKING FOR: A self-driven individual with a willingness to learn, resourceful and passionate about technology. Able to adapt to a highly collaborative environment. Hand-ons mindset and can-do attitude RELEVANT SKILLSETS: Knowledge in digital logic design and possess a solid foundation in RTL coding with VHDL or Verilog. Proficient in C programming, particularly for embedded firmware development. Comfortable with scripting languages such as Python, Bash, or Perl ACADEMIC CREDENTIALS: Background in Electronical and Electronics Engineering, Computer Engineering/ Science #LI-SPAs an AMD [intern/co-op], you’ll be placed at the epicenter of the AI ecosystem, working alongside experts and industry pioneers. You’ll do important work, learn new skills, expand your network, and gain real-world experience on projects that impact millions of end-users worldwide. Whether you’re an undergrad or a PhD student, your contributions matter—and your experience here will be a launchpad for what comes next. LOCATION: Singapore CRITERIA: Current students studying in Universities which are based in Singapore INTERNSHIP DURATION: The internship will begin on either 4 May 2026 or 20 July 2026, and will end on 4 Dec 2026. There is an option to extend the internship, with the extended period concluding on a fixed date of 18 Dec 2026. Intern – FPGA Design, Validation, and Automation for AMD Xilinx SoC Platforms WHAT YOU CAN EXPECT TO LEARN: Gain hands-on experience with industry-standard AMD Xilinx toolchains and hardware platforms. Learn about the architecture and bring-up processes for AMD Xilinx SoCs, including Versal ACAP and Spartan UltraScale+ MPSoC. Develop skills in validating hardware interfaces, writing embedded firmware, and automating verification and validation flows. Build a strong foundation in FPGA/SoC development and system-level debugging. PROJECT OVERVIEW: Work as part of our engineering team to develop and validate advanced hardware designs on AMD Xilinx platforms. You will contribute to Vivado and Vitis projects, support hardware platform bring-up and testing, and help automate validation workflows for next-generation AMD SoC products. KEY RESPONSIBILITIES: Develop Vivado and Vitis projects tailored to AMD Xilinx hardware platforms. Validate hardware interfaces and test compiled project binaries on AMD SoC evaluation boards. Bring up hardware platforms, perform low-level debugging, and using embedded tools to configure systems. Creating detailed documentation and writing automation scripts to support a repeatable validation flow. WHO ARE WE LOOKING FOR: A self-driven individual with a willingness to learn, resourceful and passionate about technology. Able to adapt to a highly collaborative environment. Hand-ons mindset and can-do attitude RELEVANT SKILLSETS: Knowledge in digital logic design and possess a solid foundation in RTL coding with VHDL or Verilog. Proficient in C programming, particularly for embedded firmware development. Comfortable with scripting languages such as Python, Bash, or Perl ACADEMIC CREDENTIALS: Background in Electronical and Electronics Engineering, Computer Engineering/ Science #LI-SP