Job Description


Job Description:

Pay Range: $67hr - $72hr
  • Strong understanding of FPGA design principles and architectures.
  • Proficiency in System Verilog and UVM verification methodology.
  • Experience with industry-standard verification tools (e.g., QuestaSim, Client VCS).
  • Knowledge of code coverage and functional coverage analysis.
  • Excellent debugging and problem-solving skills.
  • Strong communication and collaboration skills.
    • Requirements:
  • Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related field.
  • Experience in FPGA verification.
  • Experience with scripting languages (e.g., Python, Perl).
  • Familiarity with hardware description languages (e.g., VHDL, Verilog).

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