Full Chip STA Lead

Full Chip STA Lead (8+ Years Experience)

Locations: Bangalore, Hyderabad, Noida, Ahmedabad, Chennai, Pune

Job Description:

We are looking for an experienced Full Chip STA Lead with strong expertise in full-chip timing, constraint management, and cross-functional collaboration. The ideal candidate will drive timing closure activities for complex SoCs and provide technical guidance to junior engineers.

Key Responsibilities:

• Handle functional and test constraints at block and top level
• Perform static timing analysis (STA) for block-level and full-chip sign-off
• Own ECO generation at the top level and coordinate with block owners for timing/functional ECO implementation
• Work closely with synthesis teams for block-level and top-level synthesis
• Drive automation initiatives using Perl, Tcl, Awk, or Python
• Mentor and guide junior engineers on technical aspects

Requirements:

• 8+ years of hands-on experience in full-chip STA
• Proven expertise in constraints handling, STA sign-off, and ECO flow
• Strong scripting and automation skills
• Excellent communication and collaboration abilities

If you’re looking to lead complex STA challenges and contribute to cutting-edge semiconductor development, we’d love to connect.