Full-Chip Timing Architect for Next‑Gen SoCs

A leading technology company in semiconductor solutions is looking for a Full Chip Engineer to develop timing methodologies for next-generation FPGA products. The ideal candidate should have a BS/MS in Electrical or Computer Engineering and at least 5 years of relevant experience. Responsibilities include timing analysis, collaboration with design teams, and troubleshooting critical design issues. This position offers a dynamic work environment in Penang, Malaysia with a regular job type.
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