GLS verification

Role: Verification Engineer

Exp: 7+ Years

Location: Bangalore

Responsibilities:

We are looking for someone to strengthen the ASIC Top level team with respect to GLS.

We are currently developing two main dies to be instantiated in various configurations in different ASICs.

One die consists of a huge number of DSPs and even more accelerator IPs for different type of computing. The same die also a common memory used by all DSPs and accelerators IPs.

Role in the Team

When working with GLS you will be involved in

• Tailor the SystemVerilog/UVM testbench to support GLS
• Verify power-up and reset sequence
• System initialization
• Verifying DFX structures added after synthesis.
• Verify all interfaces that are used for the silicon bring-up

Requirements:

• ...