Job Description

We’re Hiring – Lead Design Verification Engineer @ Eximietas Design!


Position: Lead Design Verification Engineer

Experience: 7+ Years

Locations: Bangalore / Ahmedabad / Pune / Hyderabad


Key Skills:

  • Proven experience in Design Verification using SystemVerilog and UVM
  • Strong experience in minimum 2 protocols like AXI, AHB, Ethernet, PCIe, UCIe, DDR, USB, NVMe, SATA , etc.


Key Responsibilities & Requirements:

  • Solid understanding of design concepts and ASIC flow
  • Experience in IP, Subsystem, and SoC verification
  • Excellent SystemVerilog/UVM coding and debugging skills
  • Hands-on experience with RAL (Register Abstraction Layer) and third-party VIP integration
  • Deep knowledge of AMBA protocols – AXI, APB, AHB
  • Verification exposure to low-speed peripherals (I2C, SPI, QSPI, DMA, Interrupt Controller, GPIO, UART)
  • Experience with high-speed protocols (PCIe, CXL, Ethernet, USB)
  • Familiarity with memory protocols (DDR, LPDDR, HBM)
  • Proficiency in tools like VCS, Xcelium , and waveform analyzers
  • Experience in GLS and Power-aware Simulation (UPF)
  • Strong analytical, problem-solving, and leadership skills
  • Experience mentoring junior engineers and leading verification teams


If you’re passionate about driving verification excellence and innovation — join our growing team at Eximietas Design!


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