Job Description
Integrated Circuit Package Design Engineer
_corporate_fare_ Google _place_ Taipei, Taiwan; Zhubei, Zhubei City, Hsinchu County, Taiwan
**Mid**
Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.
_info_outline_
XGoogle welcomes people with disabilities.Note: By applying to this position you will have an opportunity to share your preferred working location from the following: **Taipei, Taiwan; Zhubei, Zhubei City, Hsinchu County, Taiwan** .
**Minimum qualifications:**
+ Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
+ 5 years industry experience in chip package design/layout using Cadence Advanced Package Designer (APD) and Mentor Expedition.
+ Experience in chip package substrate designs, layout, optimization, design verification, DFM ...
_corporate_fare_ Google _place_ Taipei, Taiwan; Zhubei, Zhubei City, Hsinchu County, Taiwan
**Mid**
Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.
_info_outline_
XGoogle welcomes people with disabilities.Note: By applying to this position you will have an opportunity to share your preferred working location from the following: **Taipei, Taiwan; Zhubei, Zhubei City, Hsinchu County, Taiwan** .
**Minimum qualifications:**
+ Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
+ 5 years industry experience in chip package design/layout using Cadence Advanced Package Designer (APD) and Mentor Expedition.
+ Experience in chip package substrate designs, layout, optimization, design verification, DFM ...
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