Job Description
Job Description Be part of the DDR PHY IP Front End Design team responsible for -
- Develop firmware for DDR5 PHY using microcontrollers
- Developing firmware in C typically involving bare-metal programming and developing low-level APIs on Microcontrollers.
- Responsible for collaborating with hardware designers and memory subsystem architects to derive training algorithms and implement them.
- Responsible for collaborating with the verification team to deduce firmware-hardware co-verification plan.
- Develop and Debug firmware in RTL based hardware simulations (C +Verilog simulations)
- Develop and Debug on Silicon bring-up boards.
- Good Knowledge of DDR5 JEDEC spec, knowledge of different DIMM configurations and specifications.
- Relevant experience in developing bare-metal firmware for High-speed SerDes or Memory interface Physical Layer blocks.
Apply for this Position
Ready to join Best NanoTech? Click the button below to submit your application.
Submit Application