Job Description
ACL Digital is Hiring for STA Engineers for Bangalore location.
Exp: 5+Years
Key Responsibilities:
Perform block-level and full-chip Static Timing Analysis (STA)
Develop and maintain SDC timing constraints (clocks, IOs, false paths, multicycle paths)
Collaborate with PD, CTS, and Desi...
Exp: 5+Years
Key Responsibilities:
Perform block-level and full-chip Static Timing Analysis (STA)
Develop and maintain SDC timing constraints (clocks, IOs, false paths, multicycle paths)
Collaborate with PD, CTS, and Desi...
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