SoC Performance Architect for Next-Generation Machine Learning ASICs

We are seeking an experienced SoC Performance Architect to define the architecture for next-generation Machine Learning ASICs.

Required Skills and Qualifications:

• Over 5 years of experience in high-performance ASIC design, preferably with a focus on Machine Learning applications;
• Proficiency in C/C++ or SystemC programming languages;
• A strong grasp of computer architecture concepts, including but not limited to: instruction-level parallelism, pipelining, cache hierarchy management; and system-on-chip (SoC) integration; 

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We are looking for exceptional candidates who can collaborate effectively with designers and software engineers. Strong communication skills in English are essential.