Job Description

  • Design and develop critical analog, mixed-signal, custom digital block and full chip level integration support.
  • Responsible for layout verification tasks such as LVS/DRC/Antenna, quality check and documentation.
  • Ensure on-time delivery of block-level layouts with acceptable quality.
  • Contribute to effective project management.
  • Communicate efficiently with engineering teams in the India, US, and Japan to ensure the success of the layout project.
  • Have 1-3 years of experience in analog/custom layout design in advanced CMOS process.
  • Expert in Cadence VLE/VXL and Calibre DRC/LVS.
  • Have hands-on experience in Critical Analog Layout design of blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc.
  • Have good understanding of Analog Layout fundamentals such as Matching, Electro-migration, Latch-up, coupling, cross-talk, IR-drop, acti...

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