NPI Technology Manager (Flip chip) & Yield Integration

Role Overview:

Lead end to end execution of new product introduction (NPI) programs for flip chip packages , ensuring successful transition from design / prototype to high volume manufacturing with target yield, reliability schedule, quality and cost targets.

Key Responsibilities:

NPI Program Execution

• Own flip chip NPI projects from customer handoff to mass production.
• Drive stage gate NPI execution
• Concept à Eng validation test à Design validation test à Product validation Test à HVM
• Ensure on time product qualification and customer approval.
• Manage multiple flip chip programs with competing priorities.

Flip-Chip Technology & Process Ownership

• Lead NPI activities across bumping, Wafer preparation, Die attach, underfill, molding, Solder ball attach and finishing processes.
• Work closely with bump vendors / internal wafer bumping TD and Process team.
• Ensure alignment on bump metallurgy (Cu pillar, SnAg, Micro bumps)
• Drive process window development, DOE and first-time right builds.

Yield, Reliability and Quality

• Own early yield ramp and root cause analysis for flip chip specific defects.
• Drive JEDEC qualification, thermal cycling, HTS, HAST and board level reliability.
• Lead PPAP/APQP documents and Implementation.

Cost, Schedule & Risk Management.

• Manage NPI cost models (Bump cost, Substrate complexity, Equipment utilization, yield impact on COGS.)
• Identify NPI risks early and drive mitigation plans.
• Support make/Buy and line selection decisions.

Customer & Stakeholder Communication.

• Serve as technical NPI focal point for customers.
• Present NPI status, Yield, risks and qualification readiness.
• Support customer audits and technical reviews.

Key Deliverables & KPI

• On time flip chip product launch.
• First pass yield and ramp to volume timeline.
• Qualification success rate
• Cost to target achievement
• Customer satisfaction during NPI phase.

Required Qualifications

• Bachelor / master in related Engineering Discipline (Preferred Materials Science)
• 10-15 years’ experience in IC packaging with strong flip chip exposure.
• Hands on knowledge of Flip chip assembly flows, CTQ, Wafer Bumping & Cu pillar technology, Advanced substrates (FC-BGA, FC-CSP, HDI), Reliability physics for FC packages.
• Strong project management and cross functional leadership skills. (Preferred. PMP training/certification).

Preferred Skills

• Experience with advanced nodes, high I/O, high power or automotive FC packages.
• Exposure to heterogeneous integration / Chiplet / 2.5D is plus.
• Familiarity with SPC, JMP/Minitab, DOE and Yield analytics.
• Experience working with global OSAT or IDM teams.