Job Description

Hi,


Please find the JD below.


FPGA Verification, 4 to 7 years of experience.


  • Develop and implement verification plans for FPGA designs.
  • Design and maintain testbenches for FPGA projects.
  • Conduct functional simulations and analyze results.
  • Collaborate with design engineers to understand design intent and constraints.
  • Document verification processes and results.
  • Identify, debug, and resolve issues found during verification.
  • Stay up-to-date with industry best practices in FPGA verification.


Please share your resume to [email protected]


Regards,

Jaya

Apply for this Position

Ready to join UST? Click the button below to submit your application.

Submit Application