Job Description
**CTG is seeking to fill a PDK Library Developer position for our client.**
**Location:** Santa Clara, CA; Burlington, VT; or Malta, NY – Hybrid (50% onsite, 50% remote)
**Duration:** 12 months
**Duties:**
+ Create and maintain parameterized cells (PCells) for transistors, passives, and special devices.
+ Develop and maintain symbols, views, and device parameter definitions for schematic and layout tools.
+ Support technology files, layer definitions, device parameters, and display attributes.
+ Execute QA test flows to validate models, PCells, and rule decks across multiple EDA tools.
+ Implement automated regression testing using Python, SKILL, Tcl, and Jenkins.
+ Debug customer issues, perform internal bug triage, and conduct cross-component integration checks.
+ Collaborate with process/device modeling teams to implement accurate SPICE and corner models.
+ Work with cross-functional teams (DRC/LVS/PERC/PEX/EMIR), silicon design t...
**Location:** Santa Clara, CA; Burlington, VT; or Malta, NY – Hybrid (50% onsite, 50% remote)
**Duration:** 12 months
**Duties:**
+ Create and maintain parameterized cells (PCells) for transistors, passives, and special devices.
+ Develop and maintain symbols, views, and device parameter definitions for schematic and layout tools.
+ Support technology files, layer definitions, device parameters, and display attributes.
+ Execute QA test flows to validate models, PCells, and rule decks across multiple EDA tools.
+ Implement automated regression testing using Python, SKILL, Tcl, and Jenkins.
+ Debug customer issues, perform internal bug triage, and conduct cross-component integration checks.
+ Collaborate with process/device modeling teams to implement accurate SPICE and corner models.
+ Work with cross-functional teams (DRC/LVS/PERC/PEX/EMIR), silicon design t...
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