Job Description

Responsibilities

  • Understand the spec requirements and convert into a micro architecture specification.

  • Realize the RTL design using Verilog/System Verilog.

  • Works with verification teams in defining the test plan and reviews the test coverage.

  • Does pre implementation design checks like lint, CDC, RDC, constraint validation.

  • Works with physical design team in defining the design and timing constraints and driving implementation till timing closure.

  • Interact with cross functional circuit teams for new product development

  • Participate in Architecture level discussions to define the specifications.

  • Post silicon validation support in bringing up parts.

    • Qualifications


  • Minimum 10 years of solid ASIC logic/Digital design expertise with bachelor’s degree or master’s degree

  • Strong digital design fundamentals.

  • Strong hands on expertise in HDLs like Verilog/System Verilog.

  • Experience with EDA tools for simulation, synthesis, and timing analysis and logic equivalence check.

  • Knowledge of High speed protocols is plus.

  • Strong scripting abilities using Perl/Tcl/python is a plus

  • Strong written and verbal communication skills. Able to break down technical concepts to a larger audience is desired.

    • About Rambus

    Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow’s systems.

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