Job Description
**Introduction**
Physical design team is responsible for designing high performance microprocessor blocks for IBM Power and z mainframe servers.
**Your role and responsibilities**
• Responsible for high performance microprocessor blocks RTL to GDSII implementation
• Perform block level synthesis, floor-planning, placement and routing.
• Close the design to meet timing, power budget and area.
• Implement ECO's to address functional bugs and timing violations.
• Team player, with good problem solving and communication skills.
**Required technical and professional expertise**
*
8-10 years industry experience in physical design methodology.
*
Good knowledge and hands on experience in physical design methodology which include logic synthesis,placement, clock tree synthesis, routing .
*
Should be knowledgeable in physical verification ( LVS,DRC.. etc), Noise analysis, Power analysis and electro migration .
*
Team player with good problem solving skills, communication skills and leadership skills.
*
Automation skills in PYTHON, PERL ,SKILL and/or TCL
*
Preferred Cadence PD tool& flow usage.
**Preferred technical and professional experience**
*
Preferred Cadence PD tool& flow usage.
IBM is committed to creating a diverse environment and is proud to be an equal-opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, gender, gender identity or expression, sexual orientation, national origin, caste, genetics, pregnancy, disability, neurodivergence, age, veteran status, or other characteristics. IBM is also committed to compliance with all fair employment practices regarding citizenship and immigration status.
Physical design team is responsible for designing high performance microprocessor blocks for IBM Power and z mainframe servers.
**Your role and responsibilities**
• Responsible for high performance microprocessor blocks RTL to GDSII implementation
• Perform block level synthesis, floor-planning, placement and routing.
• Close the design to meet timing, power budget and area.
• Implement ECO's to address functional bugs and timing violations.
• Team player, with good problem solving and communication skills.
**Required technical and professional expertise**
*
8-10 years industry experience in physical design methodology.
*
Good knowledge and hands on experience in physical design methodology which include logic synthesis,placement, clock tree synthesis, routing .
*
Should be knowledgeable in physical verification ( LVS,DRC.. etc), Noise analysis, Power analysis and electro migration .
*
Team player with good problem solving skills, communication skills and leadership skills.
*
Automation skills in PYTHON, PERL ,SKILL and/or TCL
*
Preferred Cadence PD tool& flow usage.
**Preferred technical and professional experience**
*
Preferred Cadence PD tool& flow usage.
IBM is committed to creating a diverse environment and is proud to be an equal-opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, gender, gender identity or expression, sexual orientation, national origin, caste, genetics, pregnancy, disability, neurodivergence, age, veteran status, or other characteristics. IBM is also committed to compliance with all fair employment practices regarding citizenship and immigration status.
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