Job Description

Physical Verification Engineer


Job Description


  • Work with various implementation team to drive full-chip Physical Verification Sign-off closure in the area of (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out.
  • Co-work with Place & Route team to resolve full-chip layout integration issues.
  • Work with various implementation team to drive Physical Verification
  • Coordinates with internal IP owners on IP related issues.
  • Coordinates with Manufacturing Team on DRC related issues.
  • Provide automation solutions to improve efficiency in tape-out flow.
  • Report on tapeout issues.
  • Custom Layout


Requirement

  • 5-10 years of experience in physical verification or design
  • Bachelor/Masters Degree in Electrical/Electronics Engineering / Computer Science
  • Preferably well-versed in Calibre, ICV
  • Proficient in script programming, such as, Tcl, Perl or C-shell
  • Proficient in UNIX (Linux) platforms
  • Track record of successful tapeout of chips
  • Strong communication skills, problem solving and analytical skills

Apply for this Position

Ready to join ? Click the button below to submit your application.

Submit Application