Principal Chip Power Integrity Engineer

Job Description Job Description Principal Chip Power Integrity Engineer Location : San Jose or Irvine in CA or Fort Collins, CO. Comp : 225-265k base 30% bonus VERY generous RSUs totaling approx $1-1.2m (which vests over 4 yrs). Total package $500-650k for Master or Distinguished Engineer Introduction A global infrastructure tech provider delivering high-performance semiconductor and enterprise software solutions that power AI workloads, data centers, and cloud platforms. Trusted for scalable, secure, and mission-critical innovation across industries. Top Reasons To Work With Us Low stress environment with great work/life balance Amazing package with base, strong bonus and industry leading RSU program! Work for an industry leader in high growth mode with huge career growth potential What You Will Be Doing Perform full chip power integrity analysis on large advanced node designs using state of the art parallel processing tools Diagnose and resolve power delivery issues across a range ...