Principal NoC IP Micro-Architect

Overview

Develops the logic design, register transfer level (RTL) coding, and simulation for Network on Chip IPs and potentially other FPGA IPs & subsystem for integration in full chip designs.

Responsibilities

• Develops the logic design, register transfer level (RTL) coding, and simulation for Network on Chip IPs and potentially other FPGA IPs & subsystem for integration in full chip designs.
• Participates in the definition of architecture and microarchitecture features of the block being designed.
• Creates prototypes, simulates models, and specifies systems requirements.
• Prepares and designs logic diagrams and codes for implementing system design and test specifications.
• Delivers software models for device level bring up, including user visible functionality, timing, and power.
• Applies RTL implementation techniques to qualify the design to meet required power, performance, and area goals, partnerin...