Job Description

Job Description: Job Description, As part of TLR team (top-level-route), R&D Engineer is primarily responsible for :-

  • Place and Route, CTS, Routability analysis with respect to congestion.
  • Well versed in physical verification aspect, DRC, LVS, Antenna, LUP, ( chip finishing and Tapeout)
  • Meeting RC requirements for manual/special signals
  • Good understanding of Calibre DRC/LVS/DFM, DFY, ERC and ESD latchup.
  • Responsible for all the integrity checks (chip-finishing) and post Tapeout eJob view release,
  • Good scripting knowledge perl and TCL, familiar with Caliber, Innovus,
  • Understanding of VLSI fabrication process,
  • Implementing timing ECOs. Implementing IR drop fixes, RC extraction, signal EM fixes, and Trans, Cap, Noise fixes.
  • Open to new responsibilities in the context of rapid technological change.
  • Good communication skills, work closely with the team members to accomp...

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