Job Description
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Job Description:
This opening is for working on chips that enable Physical Layer Products for High
Speed Optical Communication.
architect block level design specifications from the marketing requirements and/or
system requirements
prepare detailed design document, timing constraint file
RTL coding, Lint checks, CDC, Synthesis, Equivalency checking, STA, RTL/gate level
simulations & silicon debug
Scripting for various IC design tasks such as STA, equivalency checks, test bench,
simulations, synthesis, etc.
prepare block level resource requirements & development schedule
generate verific...
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