RISC-V Manager / HW Engineering Manager

Working for a cutting edge semiconductor company, based in Barcelona I have an exciting opportunity as HW Engineering Manager.

You will be tasked with managing a team who are developing a RISC-V SOC.

Applicants can come from an architecture, digital design or verification background.

MUST HAVE - Deep understanding of ASIC, FPGA and SOC development processes.

Must have experience:

• Degree / Masters / PhD in electronics / micro-electronics, physics or similar field
• 10+ years experience of full chip design and delivery
• Tech lead / team leadership / team management - circa 10+ people
• ASIC / FPGA digital design - verilog, system verilog, VHDL
• Significant experience of delivering: digital chips and complex processor based SOCs
• CPU / GPU / RISC-V / MIPS / ISA / x86 processor knowledge

• SOC design, arc...