Job Description
Hi FolksACL Digital is Hiring!Experience: 4 - 5+ YearsLocation: Bangalore / Hyderabad Looking: Immediate to 20 daysHiring | RTL Design Engineer Strong experience in RTL Design using Verilog/System Verilog Exposure to complex So C/ASIC design and integration Hands-on with synthesis, Lint, CDC preferred Share resume at #RTLEngineer #ACLdigital #VLSIJobs #ASICDesign #Verilog #System Verilog #So C Thanks,K Himabindu
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