Job Description
Job Title: RTL Design Engineers
Exp Level: 2-3 yrs
Loctaion: Hyderabad
Job Description:
- Seeking a motivated RTL Design Engineer to develop, integrate, and verify digital logic using Verilog/System Verilog.
- Responsibilities include ASIC/So C IP integration, linting, synthesis, and ...
Exp Level: 2-3 yrs
Loctaion: Hyderabad
Job Description:
- Seeking a motivated RTL Design Engineer to develop, integrate, and verify digital logic using Verilog/System Verilog.
- Responsibilities include ASIC/So C IP integration, linting, synthesis, and ...
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