Semiconductor Design Engineer 3_INR

Title: Semiconductor Design Engineer 3_INR

Location: Hyderabad

Experience :4-6 Years

Job Description :

As a STA Verification Engineer at HBM Micron Technology, Inc., you will be responsible for writing constraints , coding MCP , analyzing the STA reports ; analyzing digital and analog circuits used in the development of memory products. We are engaged in developing groundbreaking silicon-to-systems solutions – right from technology development and advanced memory designs to product development, systems design and validation resulting in world class memory solutions. In this position, you will collaborate with Micron’s various design and verification Responsibilities will include, but are not limited to: • Static timing Analysis of DRAM block wise , top level analysis , cell level analysis • Writing constraints , analyzing the STA reports • Circuit understanding block wise , Full chip level • Reporting violations to Design team , ownership for closure • Knowledge of STD cells characterization work (max up to 40% of time) , Static timing analysis (60%) • Able to characterize basic STD Cells • Parasitic modeling and assisting in design validation, reticle experiments and required tape-out revisions • Performing verification processes with modeling and simulation using industry standard simulators • Contributing to cross group communication to work towards standardization and group success • Driving innovation into the future Memory generations within a dynamic work environment.