Senior Analog Design Engineer – High-Speed I/O

We are seeking an experienced and passionate Analog Design Engineer with 5–10 years of expertise in high‑speed I/O circuit design to join our team. In this role, you will contribute to the architecture, design, simulation, and silicon validation of cutting‑edge analog and mixed‑signal IPs for advanced technology nodes.

Key Responsibilities:

Design & optimize high‑speed analog/mixed‑signal I/O circuits: TX/RX, PLL/DLL/CDR, CTLE/FFE/DFE, biasing & ESD‑aware inputs.

Lead block‑level architecture and transistor‑level simulations (AC, transient, noise, jitter, BER).

Handle pre/post‑layout verification with parasitic extraction.

Solve signal‑integrity issues (loss, crosstalk, reflections).

Collaborate with layout, digital, PD, packaging & system teams.

Support silicon bring‑up, lab characterization, and debug.

Ensure compliance with interface specs and PVT robustness. corners.

Required Qualifications:

• B.Tech/M.Tech in Electrical Engineering or related field.
• 5–10 years in analog/mixed‑signal design with high‑speed I/O experience.
• Strong knowledge of jitter, noise, BER, SI, and channel modeling.
• Proficient in Spectre/HSPICE/Eldo.
• Solid understanding of CMOS device physics & PVT variations.
• Experience with advanced technology nodes and full design ownership.

Join us in shaping the next generation of high‑speed interfaces and bring your innovation to life in silicon.