Senior ASIC Formal Verification Engineer

A technology solutions provider based in Canada is seeking an ASIC Design Verification engineer to drive verification activities focused on formal verification. The role involves close collaboration with design and architecture teams to comprehend specifications and establish verification requirements. Key skills include proficiency in System Verilog assertions and debugging, with assets including Low Power Verification experience and knowledge of OOP/UVM. This position offers the opportunity to have a significant impact on design quality and improvements.
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