Senior ASIC Verification Engineer - SV/UVM Expert

A leading design services company in Ottawa is seeking an experienced ASIC Verification Engineer with 8 to 12 years of expertise. You will read and validate architectural specifications, develop verification plans, and create testbench environments using System Verilog UVM. The ideal candidate possesses strong programming skills in C and Python, along with excellent analytical and problem-solving abilities. Join a team committed to innovation and excellence in technology.
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