Job Description
Senior CPU Formal Verification Engineer, Silicon
_corporate_fare_ Google _place_ Austin, TX, USA; Mountain View, CA, USA; +3 more; +2 more
**Mid**
Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.
_info_outline_
XNote: By applying to this position you will have an opportunity to share your preferred working location from the following: **Austin, TX, USA; Mountain View, CA, USA; Portland, OR, USA; Poughkeepsie, NY, USA** .
**Minimum qualifications:**
+ Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
+ 8 years of experience verifying digital logic at RTL using SystemVerilog for ASICs.
+ Experience capturing design specification in a temporal assertion language (e.g., SVA or PSL).
+ Experience with one or more Design Verification ...
_corporate_fare_ Google _place_ Austin, TX, USA; Mountain View, CA, USA; +3 more; +2 more
**Mid**
Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.
_info_outline_
XNote: By applying to this position you will have an opportunity to share your preferred working location from the following: **Austin, TX, USA; Mountain View, CA, USA; Portland, OR, USA; Poughkeepsie, NY, USA** .
**Minimum qualifications:**
+ Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
+ 8 years of experience verifying digital logic at RTL using SystemVerilog for ASICs.
+ Experience capturing design specification in a temporal assertion language (e.g., SVA or PSL).
+ Experience with one or more Design Verification ...
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